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| VNQ830P-E Quad channel high-side driver Features Type VNQ830P-E RDS(on) 65 m(1) IOUT 6A VCC 36 V 1. Per each channel. ECOPACK(R): lead free and RoHS compliant Automotive Grade: compliance with AEC guidelines Very low standby current CMOS compatible input On-state open-load detection Off-state open-load detection Thermal shutdown protection and diagnosis Undervoltage shutdown Overvoltage clamp Output stuck to VCC detection Load current limitation Reverse battery protection Electrostatic discharge protection SO-28 (double island) Description The VNQ830P-E is a quad HSD formed by assembling two VND830P-E chips in the same SO-28 package. The VND830P-E is a monolithic device made using| STMicroelectronicsTM VIPowerTM M0-3 technology. The VNQ830P-E is intended for driving any type of multiple load with one side connected to ground. The active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects the open-load condition in both the on and off-state. In the off-state the device detects if the output is shorted to VCC. The device automatically turns off in the case where the ground pin becomes disconnected. Table 1. Device summary Package SO-28 Tube VNQ830P-E Tape and reel VNQ830PTR-E May 2010 Doc ID 10861 Rev 3 1/28 www.st.com 1 VNQ830P-E Contents Contents 1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 2.2 2.3 2.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 18 3.1.1 3.1.2 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 18 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 19 3.2 3.3 3.4 3.5 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 21 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1 SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 5.2 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 10861 Rev 3 2/28 VNQ830P-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V; Tj = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Thermal calculation according to the PCB heatsink area . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 10861 Rev 3 3/28 VNQ830P-E List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 23 SO-28 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 23 Thermal fitting model of a quad channel HSD in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SO-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 SO-28 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Doc ID 10861 Rev 3 4/28 VNQ830P-E Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram VCC1,2 Vcc CLAMP OVERVOLTAGE UNDERVOLTAGE GND1,2 CLAMP 1 OUTPUT1 DRIVER 1 CLAMP 2 INPUT1 STATUS1 CURRENT LIMITER 1 LOGIC OVERTEMP. 1 OPEN-LOAD ON 1 CURRENT LIMITER 2 INPUT2 OPEN-LOAD OFF 1 STATUS2 OPEN-LOAD ON 2 DRIVER 2 OUTPUT2 OPEN-LOAD OFF 2 OVERTEMP. 2 VCC3,4 Vcc CLAMP OVERVOLTAGE UNDERVOLTAGE GND3,4 INPUT3 STATUS3 OVERTEMP. 3 INPUT4 OPEN-LOAD OFF 3 STATUS4 OPEN-LOAD OFF 4 OVERTEMP. 4 LOGIC CURRENT LIMITER 3 OPEN-LOAD ON 3 CURRENT LIMITER 4 OPEN-LOAD ON 4 DRIVER 4 OUTPUT4 CLAMP 3 DRIVER 3 CLAMP 4 OUTPUT3 Doc ID 10861 Rev 3 5/28 VNQ830P-E Figure 2. Configuration diagram (top view) Block diagram and pin description VCC1,2 GND 1,2 INPUT1 STATUS1 STATUS2 INPUT2 VCC1,2 VCC3,4 GND 3,4 INPUT3 STATUS3 STATUS4 INPUT4 VCC3,4 1 28 VCC1,2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4 VCC3,4 14 15 Table 2. Suggested connections for unused and not connected pins Status X N.C. X X Output X Input X Through 10 K resistor Connection / pin Floating To ground Doc ID 10861 Rev 3 6/28 VNQ830P-E Electrical specifications 2 2.1 Electrical specifications Absolute maximum ratings Stressing the device above the rating listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document. Table 3. Symbol VCC - VCC - IGND IOUT - IOUT IIN ISTAT DC supply voltage Reverse DC supply voltage DC reverse ground pin current DC output current Reverse DC output current DC input current DC status current Electrostatic discharge (Human Body Model: R=1.5 K; C = 100 pF) - INPUT - STATUS - OUTPUT - VCC Maximum switching energy (L = 1.5 mH; RL = 0 ; Vbat = 13.5 V; Tjstart = 150 C; IL = 9 A) Power dissipation (per island) at Tlead = 25 C Junction operating temperature Storage temperature Absolute maximum ratings Parameter Value 41 - 0.3 - 200 Internally limited -6 +/- 10 +/- 10 Unit V V mA A A mA mA VESD 4000 4000 5000 5000 85 6.25 Internally limited - 55 to 150 V V V V mJ W C C EMAX Ptot Tj Tstg Doc ID 10861 Rev 3 7/28 VNQ830P-E Electrical specifications 2.2 Thermal data Table 4. Symbol Rthj-lead Rthj-amb Rthj-amb Thermal data (per island) Parameter Thermal resistance junction-lead Thermal resistance junction-ambient (one chip ON) Thermal resistance junction-ambient (two chips ON) 60(1) 46(1) Value 15 44(2) 31(2) Unit C/W C/W C/W 1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35 m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35 m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 2.3 Electrical characteristics Values specified in this section are for 8 V < VCC < 36 V; -40C < Tj < 150C, unless otherwise stated. Figure 3. Current and voltage conventions IS3,4 VCC3,4 IIN1 VIN1 VSTAT1 VIN2 VSTAT2 VIN3 VSTAT3 ISTAT1 IIN2 ISTAT2 IIN3 ISTAT3 IIN4 INPUT1 STATUS1 INPUT2 STATUS2 INPUT3 STATUS3 INPUT4 STATUS4 GND3,4 OUTPUT2 IOUT3 OUTPUT3 IOUT4 OUTPUT4 GND1,2 IGND3,4 IGND1,2 VOUT4 VOUT3 OUTPUT1 IOUT2 VOUT2 IOUT1 VOUT1 VCC3,4 VCC1,2 IS1,2 VF1(1) VCC1,2 VIN4 ISTAT4 VSTAT4 1. VFn = VCCn - VOUTn during reverse battery condition. Table 5. Symbol VCC VUSD VOV Power Parameter Operating supply voltage Undervoltage shutdown Overvoltage shutdown Test conditions Min. 5.5 3 36 Typ. Max. Unit 13 4 36 5.5 V V V Doc ID 10861 Rev 3 8/28 VNQ830P-E Table 5. Symbol RON Electrical specifications Power (continued) Parameter On-state resistance Test conditions IOUT = 2 A; Tj = 25C IOUT = 2 A; VCC > 8 V Off-state; VCC = 13 V; VIN = VOUT = 0 V Off-state; VCC = 13 V; VIN = VOUT = 0 V; Tj = 25C On-state; VCC = 13 V; VIN = 5 V; IOUT = 0 A IL(off1) IL(off2) IL(off3) IL(off4) Off-state output current VIN = VOUT = 0 V Off-state output current VIN = 0V; VOUT = 3.5 V Off-state output current Off-state output current VIN = VOUT = 0V; VCC = 13 V; Tj = 125C VIN = VOUT = 0 V; VCC = 13 V; Tj =25C 0 -75 12 Min. Typ. Max. Unit 65 130 40 m m A IS Supply current 12 25 A 5 7 50 0 5 3 mA A A A A Table 6. Symbo l TTSD TR Thyst tSDL Ilim Vdemag Protections Parameter Shutdown temperature Reset temperature Thermal hysteresis Status delay in overload conditions Current limitation Turn-off output clamp voltage Tj > TTSD VCC = 13 V 5.5 V < VCC < 36 V IOUT = 2 A; L = 6 mH 6 9 Test conditions Min. 150 135 7 15 20 15 15 Typ. 175 Max. 200 Unit C C C s A A V VCC -41 VCC -48 VCC -55 Note: To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 7. Symbol VF VCC - output diode Parameter Forward on voltage Test conditions - IOUT = 1.2 A; Tj = 150C Min. Typ. Max. 0.6 Unit V Doc ID 10861 Rev 3 9/28 VNQ830P-E Table 8. Symbol td(on) Electrical specifications Switching (VCC = 13V; Tj = 25C) Parameter Turn-on delay time Test conditions RL = 6.5 from VIN rising edge to VOUT = 1.3 V (see Figure 5) RL = 6.5 from VIN falling edge to VOUT = 11.7 V (see Figure 5) RL = 6.5 from VOUT = 1.3 V to VOUT = 10.4 V (see Figure 5) RL = 6.5 from VOUT = 11.7 V to VOUT = 1.3 V (see Figure 5) Min. Typ. 30 Max. Unit s td(off) Turn-off delay time - 30 - s dVOUT/dt(on) Turn-on voltage slope - See Figure 10 See Figure 12 - V/s dVOUT/dt(off) Turn-off voltage slope - - V/s Table 9. Symbol VIL IIL VIH IIH VI(hyst) VICL Logic inputs Parameter Input low level Low level input current Input high level High level input current Input hysteresis voltage Input clamp voltage IIN = 1 mA IIN = -1 mA VIN = 3.25 V 0.5 6 6.8 - 0.7 8 VIN = 1.25 V 1 3.25 10 Test conditions Min. Typ. Max. 1.25 Unit V A V A V V V Table 10. Symbol VSTAT ILSTAT CSTAT VSCL Status pin Parameter Status low output voltage Status leakage current Status pin input capacitance Status clamp voltage Test conditions ISTAT = 1.6 mA Normal operation; VSTAT = 5 V Normal operation; VSTAT = 5 V ISTAT = 1 mA ISTAT = - 1 mA 6 6.8 - 0.7 Min. Typ. Max. 0.5 10 100 8 Unit V A pF V V Doc ID 10861 Rev 3 10/28 VNQ830P-E Table 11. Symbol IOL tDOL(on) VOL tDOL(off) Electrical specifications Open-load detection Parameter Test conditions Min. 50 Typ. 100 Max. 200 200 1.5 2.5 3.5 1000 Unit mA s V s Open-load on-state detection VIN = 5 V threshold Open-load on-state detection IOUT = 0 A delay Open-load off-state voltage detection threshold Open-load detection delay at turn-off VIN = 0 V Figure 4. Status timings OVERTEMP STATUS TIMING Tj > TTSD OPEN-LOAD STATUS TIMING (with external pull-up) IOUT < IOL VOUT > VOL VINn VINn VSTATn VSTATn tSDL tDOL(off) tDOL(on) tSDL Doc ID 10861 Rev 3 11/28 VNQ830P-E Figure 5. Switching characteristics VOUT Electrical specifications 80% dVOUT/dt(on) tr ISENSE 90% 10% 90% dVOUT/dt(off) tf t INPUT tDSENSE t td(off) td(on) t Table 12. Truth table Input L H L H H L H L H L H L H L H Output L H L X X L L L L L L H H L H Status H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L Conditions Normal operation Current limitation Overtemperature Undervoltage Overvoltage Output voltage > VOL Output current < IOL Doc ID 10861 Rev 3 12/28 VNQ830P-E Table 13. ISO T/R 7637/1 test pulse 1 2 3a 3b 4 5 I - 25 V(1) + 25 V(1) (1) Electrical specifications Electrical transient requirements Test level II - 50 V(1) + 50 V - 50 V (1) III - 75 V(1) + 75 V (1) (1) IV - 100 V(1) + 100 V - 150 V (1) Delays and impedance 2 ms, 10 0.2 ms, 10 0.1 s, 50 0.1 s, 50 100 ms, 0.01 400 ms, 2 - 25 V (1) - 100 V (1) + 25 V(1) -4 V(1) (1) + 50 V(1) -5V (1) (2) + 75 V(1) -6V (1) (2) + 100 V(1) -7V (1) (2) + 26.5 V + 46.5 V + 66.5 V + 86.5 V 1. All functions of the device are performed as designed after exposure to disturbance. 2. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. Doc ID 10861 Rev 3 13/28 VNQ830P-E Figure 6. Waveforms Electrical specifications NORMAL OPERATION INPUTn LOAD VOLTAGEn STATUSn UNDERVOLTAGE VUSDhyst VUSD VCC INPUTn LOAD VOLTAGEn STATUS undefined OVERVOLTAGE VCC OPEN-LOAD without external pull-up INPUTn LOAD VOLTAGEn STATUSn OVERTEMPERATURE Tj INPUTn LOAD CURRENTn STATUSn TTSD TR Doc ID 10861 Rev 3 14/28 VNQ830P-E Electrical specifications 2.4 Figure 7. 2.5 2.25 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 Electrical characteristics curves Off-state output current Figure 8. Iih (uA) 5 High level input current IL(off1) (uA) Off state Vcc=36V Vin=Vout=0V 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 Vin=3.25V -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 9. 8 7.8 7.6 7.4 7.2 7 6.8 6.6 Input clamp voltage Figure 10. Turn-on voltage slope dVout/dt(on) (V/ms) 800 700 600 500 400 300 200 Vicl (V) Iin=1mA Vcc=13V Rl=6.5Ohm 6.4 6.2 6 -50 -25 0 25 50 75 100 125 150 175 100 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 11. 50 48 46 Overvoltage shutdown Figure 12. Turn-off voltage slope dVout/dt(off) (V/ms) 600 550 500 Vov (V) Vcc=13V Rl=6.5Ohm 44 42 40 38 36 34 32 30 -50 -25 0 25 50 75 100 125 150 175 250 200 -50 -25 0 25 50 75 100 125 150 175 450 400 350 300 Tc (C) Tc (C) Doc ID 10861 Rev 3 15/28 VNQ830P-E Figure 13. ILIM vs Tcase Ilim (A) 20 18 16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150 175 Electrical specifications Figure 14. On-state resistance vs VCC Ron (mOhm) 120 110 100 90 80 70 60 50 40 30 20 10 0 5 10 15 20 25 30 35 40 Tc=150C Vcc=13V Tc=25C Tc= - 40C Iout=2A Tc (C) Vcc (V) Figure 15. Input high level Vih (V) 3.6 3.4 3.2 3 2.8 2.6 2.4 2.2 2 -50 -25 0 25 50 75 100 125 150 175 Figure 16. Input hysteresis voltage Vhyst (V) 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 17. On-state resistance vs Tcase Ron (mOhm) 160 140 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 150 175 Figure 18. Input low level Vil (V) 2.6 2.4 Iout=2A Vcc=8V; 13V & 36V 2.2 2 1.8 1.6 1.4 1.2 1 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Doc ID 10861 Rev 3 16/28 VNQ830P-E Figure 19. Status leakage current Ilstat (uA) 0.05 Electrical specifications Figure 20. Status low output voltage Vstat (V) 0.8 0.7 0.04 0.6 Istat=1.6mA Vstat=5V 0.03 0.5 0.4 0.02 0.3 0.2 0.01 0.1 0 -50 -25 0 25 50 75 100 125 150 175 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 21. Status clamp voltage Figure 22. Open-load on-state detection threshold Iol (mA) 150 140 Vscl (V) 8 7.8 7.6 7.4 7.2 7 6.8 6.6 6.4 6.2 6 -50 -25 0 25 50 75 100 125 150 175 Istat=1mA 130 120 110 100 90 80 70 60 50 -50 -25 Vcc=13V Vin=5V 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 23. Open-load off-state voltage detection threshold Vol (V) 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Vin=0V Tc (C) Doc ID 10861 Rev 3 17/28 VNQ830P-E Application information 3 Application information Figure 24. Application schematic +5V Rprot STATUS1 +5V +5V VCC1,2 VCC3,4 Rprot INPUT1 Dld Rprot STATUS2 OUTPUT1 Rprot C INPUT2 Rprot STATUS3 OUTPUT2 Rprot INPUT3 OUTPUT3 Rprot Rprot STATUS4 OUTPUT4 INPUT4 GND1,2 GND3,4 RGND +5V +5V VGND DGND Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2. 3.1 GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 Solution 1: a resistor in the ground line (RGND only) This can be used with any type of load. The following show how to dimension the RGND resistor: 1. 2. RGND 600 mV / 2 (IS(on)max) RGND ( - VCC) / ( - IGND) Doc ID 10861 Rev 3 18/28 VNQ830P-E Application information where - IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0 during reverse battery situations) is: PD = ( - VCC)2/ RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that, if the microprocessor ground is not shared by the device ground, then the RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift varies depending on how many devices are ON in the case of several highside drivers sharing the same RGND . If the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then ST suggests using solution 2 below. 3.1.2 Solution 2: a diode (DGND) in the ground line A resistor (RGND = 1 k) should be inserted in parallel to DGND if the device is driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network produces a shift (~600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift not varies if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. 3.2 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than those shown in Table 13. 3.3 MCU I/O protection If a ground protection network is used and negative transients are present on the VCC line, the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from latching up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os: - VCCpeak / Ilatchup Rprot (VOHC - VIH - VGND) / IIHmax Doc ID 10861 Rev 3 19/28 VNQ830P-E Application information Example For the following conditions: VCCpeak = - 100 V Ilatchup 20 mA VOHC 4.5 V 5 k Rprot 65 k. Recommended values are: Rprot = 10 k 3.4 Open-load detection in off-state Off-state open-load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1. No false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition: No misdetection when load is disconnected: in this case the VOUT has to be higher than VOLmax; this results in the following condition: VOUT = (VPU / (RL + RPU))RL < VOlmin. 2. RPU < (VPU - VOLmax) / IL(off2). Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in standby. Figure 25. Open-load detection in off-state V batt. VCC RPU INPUT DRIVER + LOGIC OUT + STATUS VOL R IL(off2) VPU RL GROUND Doc ID 10861 Rev 3 20/28 VNQ830P-E Application information 3.5 Maximum demagnetization energy (VCC = 13.5 V) Figure 26. Maximum turn-off current versus load inductance ILM AX (A) 100 10 A C B 1 0.1 1 L(mH) 10 100 A = single pulse at TJstart = 150C B= repetitive pulse at TJstart = 100C C= repetitive pulse at TJstart = 125C VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL = 0 . In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Doc ID 10861 Rev 3 21/28 VNQ830P-E Package and PCB thermal data 4 4.1 Package and PCB thermal data SO-28 thermal data Figure 27. SO-28 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 m, Copper areas: 0.5 cm2, 3 cm2, 6 cm2). Table 14. Chip 1 ON OFF ON ON Thermal calculation according to the PCB heatsink area Tjchip1 RthA x Pdchip1 + Tamb RthC x Pdchip2 + Tamb RthB x (Pdchip1 + Pdchip2) + Tamb (RthA x Pdchip1) + RthC x Pdchip2 + Tamb Chip 2 OFF ON ON ON Tjchip2 RthC x Pdchip1 + Tamb RthA x Pdchip2 + Tamb RthB x (Pdchip1 + Pdchip2) + Tamb (RthA x Pdchip2) + RthC x Pdchip1 + Tamb Note Pdchip1 = Pdchip2 Pdchip1 Pdchip2 RthA = thermal resistance junction to ambient with one chip ON RthB = thermal resistance junction to ambient with both chips ON and Pdchip1 = Pdchip2 RthC = mutual thermal resistance Doc ID 10861 Rev 3 22/28 VNQ830P-E Package and PCB thermal data Figure 28. Rthj-amb vs PCB copper area in open box free air condition RTHj_am b (C/W) 70 60 50 RthA 40 30 20 10 0 1 2 3 4 5 PCB Cu heatsink area (cm ^2)/island 6 7 RthB RthC Figure 29. SO-28 thermal impedance junction ambient single pulse ZT H (C/W) 1000 100 Footprint 6 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000 Doc ID 10861 Rev 3 23/28 VNQ830P-E Equation 1: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where Package and PCB thermal data = tp T Figure 30. Thermal fitting model of a quad channel HSD in SO-28 Tj_1 C1 C2 C3 C4 C5 C6 P d1 R1 R2 R3 R4 R5 R6 T j _2 P d2 C 13 C 14 R 13 R 14 R 17 R 18 Tj_3 P d3 C7 C8 C9 C 10 C 11 C 12 R7 R8 R9 R 10 R 11 R 12 T j _4 P d4 C 15 C 16 R 15 R 16 T_am b Table 15. Thermal parameters Area / island (cm2) R1 = R7 = R13 = R15 (C/W) R2 = R8 = R14 = R16 (C/W) R3 = R9 (C/W) R4 = R10 (C/W) R5 = R11 (C/W) R6 = R12 (C/W) C1 = C7 = C13 = C15 (W.s/C) C2 = C8 = C14 = C16 (W.s/C) C3 = C9 (W.s/C) C4 = C10 (W.s/C) C5 = C11 (W.s/C) C6 = C12 (W.s/C) R17 = R18 (C/W) Footprint 0.15 0.8 4.5 11 15 5 0.0006 2.10 E-03 6 E-03 0.2 1.5 5 150 6 13 8 Doc ID 10861 Rev 3 24/28 VNQ830P-E Package and packing information 5 5.1 Package and packing information ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. Figure 31. SO-28 package dimensions Table 16. SO-28 mechanical data Millimeters Symbol Min. A a1 b b1 C c1 D E e e3 F L S 7.40 0.40 8 (max.) 17.7 10.00 1.27 16.51 7.60 1.27 0.10 0.35 0.23 0.50 45 (typ.) 18.1 10.65 Typ. Max. 2.65 0.30 0.49 0.32 Doc ID 10861 Rev 3 25/28 VNQ830P-E Package and packing information 5.2 SO-28 packing information Figure 32. SO-28 tube shipment (no suffix) Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm. C B 28 700 532 3.5 13.8 0.6 A Figure 33. SO-28 tape and reel shipment (suffix "TR") Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 16.4 60 22.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 12 1.5 1.5 7.5 6.5 2 End All dimensions are in mm. Start Top cover tape No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min Components No components Doc ID 10861 Rev 3 26/28 VNQ830P-E Revision history 6 Revision history Table 17. Replaced Document revision history Revision 1 2 Initial release. Document reformatted and restructured. Added contents, list of tables and figures. Added ECOPACK(R) packages information. Changed Features list. Replaced VND830P-E to VND830-E. Date 03-May-2006 18-Dec-2008 Changes 03-May-2010 3 Doc ID 10861 Rev 3 27/28 VNQ830P-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2010 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 10861 Rev 3 28/28 |
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